Author of the publication

mm2@ 82%-Peak-Efficiency DC-DC Converters.

P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro-Panades, C. Tortolero, J. Durupt, C. Bernard, D. Varreau, J. Pontes, S. Thuries, D. Coriat, M. Harrand, D. Dutoit, D. Lattard, L. Arnaud, J. Charbonnier, P. Coudrain, A. Garnier, F. Berger, A. Gueugnot, A. Greiner, Q. Meunier, A. Farcy, A. Arriordaz, S. Cheramy, and F. Clermidy. ISSCC, page 46-48. IEEE, (2020)

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Guillaume Pierre

Guillaume Klein

Guillaume Schurgers

Guillaume Weick

Guillaume Jacques

Other publications of authors with the same name

IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, C. Tortolero, I. Miro-Panades, G. Moritz, J. Durupt, C. Bernard, D. Varreau and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs.A. Grover, P. Kumar, M. Daud, G. Visweswaran, C. Parthasarathy, J. Noel, D. Turgis, B. Giraud, and G. Moritz. ICICDT, page 1-4. IEEE, (2015)Very High Brightness, High Resolution CMOS Driving Circuit for Microdisplay in Augmented Reality.M. Vigier, T. Pilloix, B. Dupont, and G. Moritz. MWSCAS, page 876-879. IEEE, (2020)A 3.0μW@5fps QQVGA Self-Controlled Wake-Up Imager with On-Chip Motion Detection, Auto-Exposure and Object Recognition.A. Verdant, W. Guicquero, N. Royer, G. Moritz, S. Martin, F. Lepin, S. Choisnet, F. Guellec, B. Deschamps, S. Clerc and 1 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs.E. Beigné, A. Valentian, B. Giraud, O. Thomas, T. Benoist, Y. Thonnart, S. Bernard, G. Moritz, O. Billoint, Y. Maneglia and 10 other author(s). DATE, page 613-618. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Optimization of a voltage sense amplifier operating in ultra wide voltage range with back bias design techniques in 28nm UTBB FD-SOI technology.G. Moritz, B. Giraud, J. Noel, D. Turgis, and A. Grover. ICICDT, page 53-56. IEEE, (2013)A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS.A. Grover, G. Visweswaran, C. Parthasarathy, M. Daud, D. Turgis, B. Giraud, J. Noel, I. Panades, G. Moritz, E. Beigné and 3 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (9): 2438-2447 (2017)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters.P. Vivet, E. Guthmuller, Y. Thonnart, G. Pillonnet, G. Moritz, I. Miro-Panades, C. Tortolero, J. Durupt, C. Bernard, D. Varreau and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)

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Disambiguation of "Moritz, Guillaume"