( en | de | ru )

 

Disambiguation of "Bulzacchelli, John F."

Author of the publication

copydeleteadd this publication to your clipboard
A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS.

, , , , , , , and . ISSCC, page 368-369. IEEE, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

John F Rauthmann

F Georgi

F Schiemann

F Gütlbauer

F Arndt

 

Other publications of authors with the same name

Distributed Network of LDO Microregulators Providing Submicrosecond DVFS and IR Drop Compensation for a 24-Core Microprocessor in 14nm SOI CMOS., , , , and . CICC, page 1-4. IEEE, (2019)A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration., , , , , , , , and . CICC, page 1-4. IEEE, (2015)An 8x 10-Gb/s Source-Synchronous I/O System Based on High-Density Silicon Carrier Interconnects., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 47 (4): 884-896 (2012)A 25 Gb/s burst-mode receiver for low latency photonic switch networks., , , , , , , and . OFC, page 1-3. IEEE, (2015)A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 58 (4): 1074-1086 (2023)Errata Erratum to Ä 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS"., , , , , , and . IEEE J. Solid State Circuits, 55 (4): 1124 (2020)A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS., , , , and . IEEE J. Solid State Circuits, 44 (12): 3526-3538 (2009)Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications., , , , , , and . ISSCC, page 94-95. IEEE, (2009)Root cause identification of an hard-to-find on-chip power supply coupling fail., , , , , , and . ITC, page 1-7. IEEE Computer Society, (2012)A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology., , , , , , , , , and 15 other author(s). ISSCC, page 360-362. IEEE, (2022)