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The effect of correlated level shifting on noise performance in switched capacitor circuits., , , and . ISCAS, page 942-945. IEEE, (2012)Binary Access Memory: An optimized lookup table for successive approximation applications., , , , and . ISCAS, page 1620-1623. IEEE, (2011)Parallel gain enhancement technique for switched-capacitor circuits., , , , , , and . CICC, page 1-4. IEEE, (2013)An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power., , , , and . ESSCIRC, page 176-179. IEEE, (2015)A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers., , , , and . IEEE J. Solid State Circuits, 54 (3): 646-658 (2019)A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion., , , , , , and . ISSCC, page 58-60. IEEE, (2019)A 9.1-12.7 GHz VCO in 28nm CMOS with a bottom-pinning bias technique for digital varactor stress reduction., , , and . ESSCIRC, page 83-86. IEEE, (2014)A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 57 (4): 1112-1124 (2022)Domino-Logic-Based ADC for Digital Synthesis., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (11): 744-747 (2011)Ring amplifiers for switched-capacitor circuits., , , , , and . ISSCC, page 460-462. IEEE, (2012)