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Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture., , , , , , и . DAC, стр. 80:1-80:6. ACM, (2017)Fixing the broken time machine: consistency-aware checkpointing for energy harvesting powered non-volatile processor., , , , , и . DAC, стр. 184:1-184:6. ACM, (2015)Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration., , , , , , и . DAC, стр. 126:1-126:6. ACM, (2015)A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops., , , , , , , , и . ESSCIRC, стр. 149-152. IEEE, (2012)A hierarchical C2RTL framework for FIFO-connected stream applications., , , , , и . ASP-DAC, стр. 133-138. IEEE, (2012)GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing., , , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (4): 640-653 (2019)Performance-centric register file design for GPUs using racetrack memory., , , , , , , и . ASP-DAC, стр. 25-30. IEEE, (2016)STICKER-T: An Energy-Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration., , , , , , , , , и 2 other автор(ы). IEEE J. Solid State Circuits, 56 (6): 1936-1948 (2021)Register allocation for hybrid register architecture in nonvolatile processors., , , , , и . ISCAS, стр. 1050-1053. IEEE, (2014)An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection., , , , , , , и . ISCAS, стр. 1-4. IEEE, (2017)