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Power delivery network design for wiring and TSV resource minimization in TSV-based 3-D ICs., , , , и . VLSI-DAT, стр. 1-4. IEEE, (2013)Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells., , , , , , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (12): 947-951 (2014)Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (11): 2097-2101 (2008)Selective body biasing for post-silicon tuning of sub-threshold designs: A semi-infinite programming approach with Incremental Hypercubic Sampling., , , , , , и . Integr., (2016)Benchmarking for research in power delivery networks of three-dimensional integrated circuits., , , , , , , , и . ISPD, стр. 17-24. ACM, (2013)Methodology of exploring ESL/RTL many-core platforms for developing embedded parallel applications., , , , , , и . SoCC, стр. 286-291. IEEE, (2014)Thermal modeling and design on smartphones with heat pipe cooling technique., , , и . ICCAD, стр. 482-489. IEEE, (2017)Approximate Computing for Batch Learning in Neural Network., , , и . ICCE-TW, стр. 1-2. IEEE, (2020)A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS., , , , , , , , , и 8 other автор(ы). ISSCC, стр. 158-159. IEEE, (2013)Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs)., , , , , и . ISVLSI, стр. 356-361. IEEE Computer Society, (2012)