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A Design-for-Diagnosis Technique for SRAM Write Drivers., , , , , и . DATE, стр. 1480-1485. ACM, (2008)Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects., , , и . ISVLSI, стр. 310-315. IEEE Computer Society, (2008)A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM., , , и . DELTA, стр. 107-110. IEEE Computer Society, (2008)Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits., , , , и . J. Electron. Test., 23 (5): 435-444 (2007)A new design-for-test technique for SRAM core-cell stability faults., , , , , , и . DATE, стр. 1344-1348. IEEE, (2009)Analysis of Resistive-Open Defects in SRAM Sense Amplifiers., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 17 (10): 1556-1559 (2009)Slow write driver faults in 65nm SRAM technology: analysis and March test solution., , , , , и . DATE, стр. 528-533. EDA Consortium, San Jose, CA, USA, (2007)Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs., , , , , и . ETS, стр. 97-104. IEEE Computer Society, (2007)March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit., , , , и . DDECS, стр. 256-261. IEEE Computer Society, (2006)Influence of Threshold Voltage Deviations on 90nm SRAM Core-Cell Behavior., , , , , , и . ATS, стр. 507-510. IEEE, (2007)