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Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains.

L. Wang, X. Wen, S. Wu, H. Furukawa, H. Chao, B. Sheu, J. Guo, and W. Jone. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 299-312 (2010)

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Sheu-Sheu Tan

Ming-Shye Sheu

Huey-jen Sheu

Ching-Long Sheu

Sien-Yi Sheu

Other publications of authors with the same name

Turbo1500: Core-Based Design for Test and Diagnosis.L. Wang, R. Apte, S. Wu, B. Sheu, W. Jone, J. Guo, K. Lee, W. Wang, X. Wen, H. Chao and 5 other author(s). IEEE Des. Test Comput., 26 (1): 26-35 (2009)A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing.H. Furukawa, X. Wen, L. Wang, B. Sheu, Z. Jiang, and S. Wu. ITC, page 1-10. IEEE Computer Society, (2006)On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs.S. Wu, L. Wang, Z. Jiang, J. Song, B. Sheu, X. Wen, M. Hsiao, J. Li, J. Huang, and R. Apte. DFT, page 143-151. IEEE Computer Society, (2008)Hybrid Built-In Self-Test Architecture for Multi-port Static RAMs.L. Yu, J. Hung, B. Sheu, B. Huynh, L. Nguyen, S. Wu, L. Wang, and X. Wen. DFT, page 331-339. IEEE Computer Society, (2010)Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains.L. Wang, X. Wen, S. Wu, H. Furukawa, H. Chao, B. Sheu, J. Guo, and W. Jone. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 299-312 (2010)UltraScan: using time-division demultiplexing/multiplexing (TDDM/TDM) with VirtualScan for test cost reduction.L. Wang, K. Abdel-Hafez, X. Wen, B. Sheu, S. Wu, S. Lin, and M. Chang. ITC, page 8. IEEE Computer Society, (2005)Practical Challenges in Logic BIST Implementation.S. Wu, H. Furukawa, B. Sheu, L. Wang, H. Chao, L. Yu, X. Wen, and M. Murakami. ATS, page 265. IEEE Computer Society, (2008)VirtualScan: Test Compression Technology Using Combinational Logic and One-Pass ATPG.L. Wang, X. Wen, S. Wu, Z. Wang, Z. Jiang, B. Sheu, and X. Gu. IEEE Des. Test Comput., 25 (2): 122-130 (2008)Test compression and logic BIST at your fingertips.S. Wu, L. Wang, J. Cho, Z. Jiang, and B. Sheu. ITC, page 2. IEEE Computer Society, (2005)Turbo1500: Toward Core-Based Design for Test and Diagnosis Using the IEEE 1500 Standard.L. Wang, R. Apte, S. Wu, B. Sheu, K. Lee, X. Wen, W. Jone, C. Yeh, W. Wang, H. Chao and 6 other author(s). ITC, page 1-9. IEEE Computer Society, (2008)

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Disambiguation of "Sheu, Boryau"

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Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains.

Please choose a person to relate this publication to

Sheu-Sheu Tan

Ming-Shye Sheu

Huey-jen Sheu

Ching-Long Sheu

Sien-Yi Sheu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Sheu, Boryau"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains.

Please choose a person to relate this publication to

Sheu-Sheu Tan

Ming-Shye Sheu

Huey-jen Sheu

Ching-Long Sheu

Sien-Yi Sheu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Using Launch-on-Capture for Testing BIST Designs Containing Synchronous and Asynchronous Clock Domains.