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Coarse-Grained Reconfigurable Array Architectures.

B. Sutter, P. Raghavan, and A. Lambrechts. Handbook of Signal Processing Systems, Springer, (2013)

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Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

Other publications of authors with the same name

An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors.B. Sutter, O. Allam, P. Raghavan, R. Vandebriel, H. Cappelle, T. Aa, and B. Mei. J. Signal Process. Syst., 61 (2): 157-179 (2010)Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling.Y. Kobayashi, M. Jayapala, P. Raghavan, F. Catthoor, and M. Imai. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 604-612 (2008)System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform.P. Agrawal, D. Milojevic, P. Raghavan, F. Catthoor, L. der Perre, E. Beyne, and R. Varadarajan. IEEE Embed. Syst. Lett., 6 (4): 85-88 (2014)A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency.R. Fasthuber, P. Raghavan, L. der Perre, and F. Catthoor. IEEE Trans. Very Large Scale Integr. Syst., 23 (10): 1973-1986 (2015)Dimensioning for power and performance under 10nm: The limits of FinFETs scaling.M. Bardon, P. Schuddinck, P. Raghavan, D. Jang, D. Yakimets, A. Mercha, D. Verkest, and A. Thean. ICICDT, page 1-4. IEEE, (2015)Modeling FinFET metal gate stack resistance for 14nm node and beyond.K. Miyaguchi, B. Parvais, L. Ragnarsson, P. Wambacq, P. Raghavan, A. Mercha, A. Mocuta, D. Verkest, and A. Thean. ICICDT, page 1-4. IEEE, (2015)Bias Temperature Instability analysis of FinFET based SRAM cells.S. Khan, I. Agbo, S. Hamdioui, H. Kukner, B. Kaczer, P. Raghavan, and F. Catthoor. DATE, page 1-6. European Design and Automation Association, (2014)Resolving the memory bottleneck for single supply near-threshold computing.T. Gemmeke, M. Sabry, J. Stuijt, P. Raghavan, F. Catthoor, and D. Atienza. DATE, page 1-6. European Design and Automation Association, (2014)Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals.T. Schuster, B. Bougard, P. Raghavan, R. Priewasser, D. Novo, L. der Perre, and F. Catthoor. SAMOS, volume 4599 of Lecture Notes in Computer Science, page 322-332. Springer, (2007)A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs.B. Zeinali, J. Madsen, P. Raghavan, and F. Moradi. IEEE Trans. Emerg. Top. Comput., 7 (2): 294-300 (2019)

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Disambiguation of "Raghavan, Praveen"

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Coarse-Grained Reconfigurable Array Architectures.

Please choose a person to relate this publication to

Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Raghavan, Praveen"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Coarse-Grained Reconfigurable Array Architectures.

Please choose a person to relate this publication to

Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Coarse-Grained Reconfigurable Array Architectures.