( en | de | ru )

 

Disambiguation of "Raghavan, Praveen"

Author of the publication

copydeleteadd this publication to your clipboard
Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors.

, , , , , , and . ASP-DAC, page 449-454. IEEE, (2009)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

 

Other publications of authors with the same name

Coarse-Grained Reconfigurable Array Architectures., , and . Handbook of Signal Processing Systems, Springer, (2013)Dimensioning for power and performance under 10nm: The limits of FinFETs scaling., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Modeling FinFET metal gate stack resistance for 14nm node and beyond., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Bias Temperature Instability analysis of FinFET based SRAM cells., , , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Resolving the memory bottleneck for single supply near-threshold computing., , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors., , , , , , and . J. Signal Process. Syst., 61 (2): 157-179 (2010)Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 604-612 (2008)A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors., , , , , , and . ARCS, volume 4415 of Lecture Notes in Computer Science, page 57-68. Springer, (2007)A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs., , , and . IEEE Trans. Emerg. Top. Comput., 7 (2): 294-300 (2019)Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology., , , and . Int. J. Circuit Theory Appl., 45 (11): 1647-1659 (2017)